The invention is directed to a barrier material and the method of making the same. The barrier material can be used as a barrier layer in integrated circuit structures.
In semiconductor integrated circuit devices barrier layers are used to minimize atomic migration of various elements from one layer to another. For example, barrier layers are used in conjunction with conductive materials, such as those used as interconnect devices or wiring layers. The conductive materials are generally isolated from other features of semiconductor integrated circuit devices by a dielectric material.
In damascene processing, the interconnect structure or wiring pattern is formed within grooves or other openings formed within a dielectric film. Using known techniques a photoresist material is used to define the wiring pattern. The patterned photoresist acts as a mask through which a pattern of the dielectric material is removed by a subtractive etch process such as plasma etching or reactive ion etching. The etched openings are used to define wiring patterns in the dielectric layer. These wiring patterns can extend from one surface of the dielectric layer to the other surface of the dielectric layer. Alternatively, the wiring patterns can be confined to a single layer, that is, not extend to the opposite surface of the dielectric layer. The wiring patterns are then filled with a metal using a filling technique such as electroplating, electroless plating, chemical vapor deposition, physical vapor deposition or a combination thereof. Excess metal can then be removed by chemical mechanical polishing through a process known as planarization.
In the single damascene process, via openings are provided in the dielectric layer and filled with a conducting metal, which is often referred to as metallization, to provide electrical contact between layers of wiring levels. In the dual damascene process, the via openings and the wiring pattern openings are both provided in the dielectric layer before filling with the conducting metal. The dual damascene process can simplify the manufacturing process by eliminating some internal interfaces. Damascene processing followed by metallization is continued for each layer in the electronic component until the electronic device is completed.
Barrier layer films are needed between the dielectric material and the conductive material in order to prevent atoms of the conductive material from migrating into and at times through the dielectric material and into other active circuit device structures. Migration of conductive material in the device can cause inter-level or intra-level shorts through the dielectric material. Also, junction leakage may result, and threshold voltage (Vt) levels of the transistors formed within the substrate can shift. In some cases, device functionality can be destroyed.
Migration is a particular concern when copper is used as the conductive interconnect material because copper exhibits relatively high mobility in materials used in semiconductor structures. Yet, in spite of this problem, copper is a favored material for interconnects because of its superior conductivity. As a result, if copper is used as an interconnect structures, the copper needs to be confined with a barrier layer.
A barrier material conventionally used in conjunction with copper interconnect structures, is tantalum (Ta) and tantalum nitride (TaN). However, because these barrier materials are more reactive than copper, the formation of contaminating interfacial oxides can result in poor adhesion properties between the deposited copper layer and the barrier material. Due to the presence of the contaminating oxides, these conventional barrier materials usually require the deposition of a Cu seed layer prior to standard Cu electrodeposition in a Cu acid bath.
Other materials that can be used as barrier layer materials in conjunction with copper also exhibit shortcomings. For example, titanium nitride also exhibits poor atomic matching on certain atomic planes along the interface it forms with copper. Also, titanium is generally considered unsuitable for use as a barrier material, because titanium combines with copper to form an inter-metallic compound which lowers the conductivity of the copper film.
As a result of the various disadvantages of present barrier materials, there remains a need to develop new materials that one, adhere well to oxide and other dielectric films, two, are not easily contaminated with oxides, and/or three, provide for direct Cu electrodeposition without the need for a seed layer.
The invention provides a barrier material. The barrier material is particularly suited for use as a barrier layer in copper interconnects structures found in semiconductor structures. The barrier material of the invention comprises two or more regions with one region containing at least 50 atom percent of a copper interface metal. The barrier material of the invention can also comprise a gradient concentration of a dielectric interface material and a copper interface metal. The copper interface metal is selected from ruthenium, rhodium, palladium, silver, gold, platinum, iridium, selenium, tellurium, or alloys thereof.
The barrier material also contains a region containing at least 50 atom percent of a dielectric interface material. The dielectric interface material is selected from tungsten, tungsten nitride, titanium, titanium nitride, tantalum, and tantalum nitride. Other dielectric materials can include alloys containing any combination of titanium, tantalum, tungsten, silicon, and nitrogen. In such applications, a region of the barrier material proximate to a dielectric contains at least 50 atom percent of a dielectric interface material, and a region of the barrier material proximate to a conducting material contains at least 50 atom percent of a copper interface metal.
The semiconductor structure of the invention comprises a dielectric layer disposed on an underlying layer and a barrier layer disposed on the dielectric layer. The barrier layer contains a dielectric interface material and a copper interface metal. The barrier layer can also include a gradient atomic concentration of a copper interface metal with a relatively high atomic concentration of the copper interface metal proximate to a conducting material. The conducting material preferably contains copper or an alloy thereof.
The barrier layer of the invention contains a dielectric interface material and a copper interface metal, wherein a surface of the barrier layer proximate to a conducting material contains at least 50 atom percent of the copper interface metal and an opposite surface of the barrier layer proximate to a dielectric contains at least 50 atom percent of the dielectric interface material.
The barrier material can provide for direct Cu electrodeposition in standard Cu acid baths used in the microelectronic industry without the need for a seed layer.
The invention is also directed to a method of making a barrier layer comprising: a) providing a dielectric layer; b) depositing a dielectric interface material on the dielectric layer; and c) depositing a copper interface metal. The copper interface metal is deposited so as to provide a region of the barrier layer containing at least about 50 atom percent of the a copper interface metal. The depositing of a copper interface metal can also include the co-deposition of the dielectric interface material.
Alternatively, the barrier layer can be made by providing a dielectric layer, and co-depositing a dielectric interface material and a copper interface metal on the dielectric layer. The copper interface metal can be deposited to provide a region of the barrier layer that contains at least about 50 atom percent of the a copper interface metal. Also, the dielectric interface material can be deposited to provide a region of the barrier layer that contains at least about 50 atom percent of the dielectric interface material.